There are many kinds of methods for sampling a current, such as by using a Hall sensor, inserting a sampling resistor in a circuit, using the body resistance of a transistor switch, using a current transformer, and so on. Each of these methods has its advantages and disadvantages.
Though Hall sensor can be used to sample current accurately, it is still expensive and big in volume for modern power supply, e.g. telecom or server power supply, which requires low cost and high power density.
Using the resistor for sampling the current is very simple. However, the resistor itself generates power loss especially on the occasion of large output current, which decreases the efficiency of the whole circuit.
Using the body resistance of the transistor switch is another simple method for sampling the current, which can not only decrease the loss but also reduce the volume. However, the body resistance of the transistor switch changes a lot according to the variation of its temperature, which affects the precision of sensed current.
Comparatively speaking, using the current transformer for sampling the current has the advantages of low cost, low loss and nicety, which makes it widely used in the modern engineering applications. In general, current transformers are connected in series with the switches in respective branch circuits for obtaining the currents of the branch circuits, thus various current control methods can be performed conveniently. Under the average current control method, the currents of the respective branch circuits will be added up for obtaining an average value of a main branch current. Thus the number of the current transformers is increased under this control method, which reduces the power density of the whole circuit.
As an example, FIG. 1 is a schematic diagram showing a conventional power factor correction circuit, wherein the switch current is sampled through a current transformer (CT). A Y-connection circuit electrically connected by an inductor L1, a switch S1, and a diode D1 is shown in FIG. 1. The switch S1 is a power transistor, such as a metal-oxide-semiconductor field effect transistor, where the current iS1 flows therethrough. The current iL1 flows through the inductor L1. And the current iD1 flows through the diode D1. If the current iS1 and the current iD1 are added up under the current average control method for obtaining the average of the current iL1, two current transformers have to be used so as to satisfy the requirement. For an interleaving power factor correction system, the number of required current transformers should be more.
Under digital control, the above-mentioned problem can be easily solved. Give an example on FIG. 1. When the power factor correction circuit 81 operates on the continuous conduction mode, the average value of the current iL1 in one switching period Ts is equal to the midpoint current of a pulse of the current iS1 or that of a pulse of the current iD1 in that switching period. Therefore, as long as the midpoint current of the pulse of the current iS1 or that of the pulse of the current iD1 in the switching period can be obtained through sampling, the average of the current iL1 in the corresponding switching period can be obtained. Relevant contents are described in the following two documents “A Sampling Algorithm for Digitally Controlled Boost PFC Converters”, David M. Van de Sype, Koen De Gusseme, etc. PESC2002 and “Sampling algorithm for small input current distortion in digitally controlled boost PFC converters”, David M. Van de Sype, Koen De Gusseme, etc, EPE2003. Under the digital control, sampling the midpoint current of the pulse of the current iS1 is very easy to be implemented.
And it is illustrated in FIG. 1 that the average current in one switching cycle is sampled at the midpoint time of the pulse of the current iS1. Relevant devices are a digital signal processor (DSP) 21, a driver 22, the switch S1, and a current transformer CT1. According to the relationship between the input voltage Vin and the output voltage Vo of the power factor correction circuit 81, the DSP 21 obtains the pulse-width duty ratio D by computation. The pulse-width duty ratio D denotes a ratio of the turn-on duration to the switching period Ts for the switch S1. According to the pulse-width duty ratio D and the switching period Ts of the power factor correction circuit 81, the DSP 21 produces a working pulse signal Vp,n, which is composed of a series of pulses.
The driver 22 coupled to the DSP 21 receives the working pulse signal Vp,n and generates a driving pulse signal Vg1 which comprises a plurality of driving pulses. The switch S1 coupled to the driver 22 receives the driving pulse signal Vg1. Because of the switch S1 being on in each driving pulse, a current pulse corresponding to the each driving pulse in the current iS1 is produced. The current transformer CT1 connected in series with the switch S1 samples the midpoint current at the midpoint time of the pulse of the current iS1 and sends the sampled signal to DSP 21.
FIG. 2 shows the corresponding waveforms of the driving pulse signal Vg1, the current iS1, and the current iL1 in the circuit 81 in FIG. 1 when sampling the average current without any response delay. As shown in FIG. 2, supposing that the working pulse signal Vp,n, the driving pulse signal Vg1, and the current iS1 and iL1 have no any response delay, that is, there is no phase difference between them, thus the sampled midpoint current of each pulse of iS1 through the current transformer CT will exactly represent the average of iL1 in the corresponding pulse when at the continuous conduction mode or critical conduction mode.
In fact, there is a response delay time Tr1 between a rising edge of each pulse of the working pulse signal Vp,n and that of a corresponding pulse of iS1, wherein the response delay time Tr1 is the sum of the response delay time Tr2 (not shown), which is the delay time between a rising edge of each pulse of Vp,n and that of a corresponding pulse of Vg1, and the response delay time Tr3 (not shown), which is the delay time between a rising edge of each pulse of Vg1 and that of a corresponding pulse of iS1. And FIG. 3 shows the corresponding waveforms of the working pulse signal Vp,n, the driving pulse signal Vg1 and the current is1 in the circuit 81 in FIG. 1 when sampling the average current with response delay, wherein Tr3 is assumed to be zero for simplicity.
In general, a sampling time point controlled by the DSP 21 is set at the point t1 shown in FIG. 3, that is, the midpoint time of each pulse of Vp,n. Because of the presence of the response delay time Tr1, there is error between the sampling value, of the current iS1 and the corresponding real average of the current iL1. Generally speaking, the sampling error due to the response delay affects the average current of iL1 little when duty ratio D is large.
According to the formula D=1−Vin/Vo for the boost power factor correction circuit 81 shown in FIG. 1, wherein Vin is the input voltage and Vo is the output voltage, the pulse-width duty ratio D decreases with the increase of the input voltage Vin; that is, the pulse-width of the working pulse signal Vp,n decreases therein. When the pulse-width duty ratio D decreases to a certain degree, a sampling error occurs that the switch S1 does not turn on at the midpoint time of a pulse of the working pulse signal Vp,n due to the response delay. Please refer to FIG. 4, which shows the corresponding waveforms of the working pulse signal Vp,n, the driving pulse signal Vg1, the current iS1 and iL1 in the circuit 81 in FIG. 1 with sampling errors due to the response delay at a high input voltage. As shown in FIG. 4, the pulse-width of the working pulse signal Vp,n becomes narrower. Thus, due to the same response delay time Tr1, the time t2, at which the switch S1 turns on, is after the sampling time t1, so that a sampling error is formed, with the sampled value of the current is zero, but in fact the average current is not zero.
Due to the sampling error, a control failure is produced. FIG. 5 shows the corresponding waveforms of the input voltage Vin and an input current Iin (not shown) in the circuit 81 in FIG. 1 due to the sampling errors, wherein the input current Iin is produced by filtering the current iL1. In FIG. 5, the input voltage Vin is 265 Vac, the output voltage Vo is 380V, and the output power is 650 W. The waveform of the input current Iin has a very serious distortion and a large spike near each peak of the input voltage Vin. Because of the small pulse-width duty ratio D near the each peak of the input voltage Vin and the response delay time Tr1, the sampled current information is incorrect, which makes the input current Iin have the very great spike. This phenomenon becomes more serious when the input voltage Vin is higher.
FIG. 6 shows another conventional power factor correction circuit with the diode current is sampled through a current transformer. The circuit 82 in FIG. 6 is a variation of the circuit 81 in FIG. 1. In FIG. 1, the current transformer CT1 connected in series with the switch S1 is for sampling the current iS1 while in FIG. 7, a CT1 is connected in series with the diode D1 for sampling the current iD1.
And the relevant devices are a DSP 21, a driver 22, a switch S1, a diode D1, and the current transformer CT1. The pulse-width duty ratio D represents the relationship between an input voltage Vin and an output voltage Vo of the power factor correction circuit 82, which is D=1−Vin/Vo. According to the relation of the D, the DSP 21 obtains the pulse-width duty ratio D by computation. As in one switching period Ts there is the complementary relation between the pulse duration of the current iS1 and the pulse duration of the current iD1, the pulse-width duty ratio D is converted as a pulse-gap-width duty ratio Dnu, the computing formula of which is Dnu=Vin/Vo, wherein the pulse-gap-width duty ratio Dnu denotes a ratio of the pulse duration period of the current iD1 to the switching period Ts. According to the pulse-width duty ratio D and the switching period Ts of the power factor correction circuit 82, the DSP 21 produces a working pulse signal Vp,n, and there is a pulse-gap between two adjacent pulses in the working pulse signal Vp,n.
The driver 22 coupled to the DSP 21 receives the working pulse signal Vp,n for producing a driving pulse signal Vg1 having a plurality of driving pulses. The switch S1 coupled to the driver 22 receives the driving pulse signal Vg1. Because of the switch S1 being on in each driving pulse, a pulse corresponding to the each driving pulse in the current iS1 is produced. The diode D1 is coupled to the switch S1. As the turn-on and off of the switch S1, the sum of the pulse duration period of the current iS1 and iD1 equals to or extremely approaches the switching period Ts here. The current transformer CT1 connected in series with the diode D1 samples the midpoint current at the midpoint time of the pulse of the current iD1 and sends the sampled signal to the DSP 21. Under the continuous conduction mode and critical conduction mode, the average current of the iL1 flowing through the inductor L1 in one switching period equals to the midpoint current of the pulse of the current iD1 in that switching period.
Please refer to FIG. 7, which shows the corresponding waveforms of the working pulse signal Vp,n, the driving pulse signal Vg1, the current iD1, and the current iL1 with sampling errors due to the response delay at a low input voltage. As shown in FIG. 7, each pulse-gap duration period in the working pulse signal Vp,n corresponds to a pulse duration in the current iD1, wherein the response delay time Tw1 is the sum of the response delay time Tw2 (not shown), which is the delay time between a rising edge of each pulse of the working pulse signal Vp,n and that of a corresponding pulse of the driving pulse signal Vg1, and the response delay time Tw3 (not shown), which is the delay time between a falling edge of each pulse of the driving pulse signal Vg1 and a rising edge of a corresponding pulse of the current iD1. And for simpleness, Tw3 is assumed to be zero.
In FIG. 7, when the input voltage Vin is small, the pulse-width duty ratio D of the working pulse signal Vp,n is large; that is, the pulse-gap-width duty ratio Dnu is small. Thus, a pulse-width of each current pulse of the current iD1 is small and consequently the problem of the sampling error appears.
In sum, in a circuit having a switch, when a driving pulse signal of the switch has a small duty ratio or a large duty ratio, how to avoid a sampling error and prevent a produced current distortion becomes the primary motive of the present invention.